Abstract
Partially reconfigurable (PR) field-programmable gate arrays (FPGAs) partition the FPGA into one static region and multiple PR regions (PRRs). This partitioning enables hardware multitasking in the PRRs, where preemption/resumption of hardware tasks requires saving/restoring the preempted task’s execution context with the possibility of relocating the task’s context to another PRR. Prior works address the involved challenges, providing partial solutions and imposing limitations that prevent portability of relocating tasks across networked PR FPGAs. In this work, a portable solution for flexible task preemption/resumption/relocation across networked PR FPGAs is introduced, where experimental results evaluate these operations, enabling system designers to tradeoff task/PRR granularity based on application requirements.
Aurelio Morales Villanueva
Professor of Reconfigurable Computing
My research interests include reconfigurable computing, computer architecture and embedded systems.