Publications

A New Methodology to Manage FPGA Distributed Memory Content via Bitstream for Xilinx ZYNQ Devices

Julen Gomez-Cornejo, Itxaso Aranzabal, Iraide López Ropero, Angel Javier Mazón, Aitzol Zuloaga

A High-Level Synthesis Approach Applicable to Autonomous Embedded Systems

Denis S. Loubach

A Survey: FPGA-Based Dynamic Scheduling of Hardware Tasks

Li Tianyang, Zhang Fan, Guo Wei, Sun Mingqian, Chen Li

Automatic Accelerator Preemption

Alireza Khadem, Sai Rohit Kandula

Context Save and Restore of Partial Reconfiguration Regions for Xilinx FPGAs

Marcel Eckert, Dominik Meyer, Bernd Klauer

A Time-based Leakage-aware Algorithm for Task Placement and Scheduling Problem on Dynamic Reconfigurable FPGA

Tingyu Zhou, Tieyuan Pan, Zhiguo Bao, Takahiro Watanabe

A Tree-Based Checkpointing Architecture for the Dependability of FPGA Computing

Hoang-Gia Vu, Shinya Takamaeda-Yamazaki, Takashi Nakada, Yasuhiko Nakashima

A Novel BRAM Content Accessing and Processing Method based on FPGA Configuration Bitstream

J. Gomez-Cornejo, A. Zuloaga, I. Villalta, J. Del Ser, U. Kretzschmar, J. Lazaro

CPRtree: A Tree-based Checkpointing Architecture for Heterogeneous FPGA Computing

Hoang-Gia Vu, Supasit Kajkamhaeng, Shinya Takamaeda-Yamazaki, Yasuhiko Nakashima

A Highly Flexible Reconfigurable System on a Xilinx FPGA

Tomáš Drahoňovský, Martin Rozkovec, Ondřej Novák